525.742.31: SOC FPGA Design Lab

Announcements:

Questions regarding class material and assignments should be directed to the mailing list through vhdlforum@echelonembedded.com. This forum will be monitored by the instructors. Use of this forum allows you to be assured an answer even if one instructor is currently unavailable. Note that you must join the forum to be allowed to post to the group. This is by invitation only, so email one of us with your email address and we will add you to the membership list.

Lecture Notes:

Lectures provided in PDF format.

Homework:

When the laboratory assignment asks for an electronic submission – please do so with the link below. Name your lab files as instructed to make sure that things end up in the right place (for example, lab1_yourlastname.zip orlab1_yourlastname.doc).

Laboratory assignments and associated links:

Documentation

Datasheets for the Spartan 3A DSP Evaluation Kit:

Various documentation sources for the Xilinx tools:

Varous links of interest:

Files

Programs available to help with labs:

VHDL Modules, ISE Projects, C Libraries for Tutorials/Labs:

Tutorials

A list of basic tutorials: